Microwave and Antanna Engineering

2009 – 2010 : Senior Section Engineer (Signal) Indian Railway, Central Railway, Mumbai. 2010 – Till now : Assistant Professor, Department of Electronics and Telecommunication Engineering, Veer Surendra Sai University of Technology, Burla, Odisha.

Graduate Level	:	BE, AEC, AdEC, EMT, DSP
Post Graduate Level	:	OSCS

Ph. D. Candidates	:	NIL
M. Tech. Candidates	:	Guided 5 M Tech students

1. Qualified GATE-2007 in Electronics and Communication Engineering with 92 percentile.

Life member of Indian Society for Technical Education(ISTE).

International Conferences

1. "Desing of Planar Array Antenna with Mutual Coupling using Cuckoo Search Optimization Algorithm", Proceeding of International Conference on computational Intelligence in data mining (ICCIDM – 2014 , India, November 24-25, 2014.
2. "A New Approach of Performance Comparison Between Microstrip Rectangular and Circular Patch Antenna using PSO", proceeding of IEEE international conference on circuit, power and computing technologies ICCPCT-2014, India, March 20-21, 2014.
3. "Designing and Optimizing a Mutually Couple Planar Array Antenna Using PSO for UHF Application", proceeding of IEEE conference on Applied  Electromagnetic  Conference (AEMC,  2013), India, Dec  18-20,2013.
4. "Performance  Comparison  of  PSO  Optimized  Mutually  Coupled Linear Array Antenna with Ygi-Uda Antenna", proceeding of IEEE    conference         on Information and communication Technology (ICT, 2013), April 11 - 12, 2013, India, pp 718-723.
5. "Optimum Design of Mutually Coupled Leaner Array Antenna and Comparison with Different Types of Array Structures", IEEE International conference on communication and signal processing, April 3 - 5, 2013, India, pp 39-43.
6. "Analysis of 3 X 5 Planar Array Antenna with Mutual Coupling and Optimization Using PSO", 2013 IEEE International conference on Emerging Trends in communication and Nanotechnology (ICECCN, 2013), March, 25 - 26,  2013, India, PP 135-140.

NIL

Six days Short Term Course on “ Recent Advancements in Signal and Image Processing (RASIP) ” at VSSUT, Burla, Odisha, India from 24th - 29th June 2013.

Professor in -charge, Electronic society, Department of Electronics and Telecommunication Engineering, VSSUT, Burla

Present Address :  Department of Electronics and Telecommunication Engineering, Veer Surendra Sai University of Tecnology, Sidhhibihar, Burla. Campus post office Sambalpur â 768018 Odisha

Permanent Address :  At : Namagaan Po : Jharabeda Via : Palalahada Dist : Angul Pin : 759119 Odisha